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| ZL40122 High Speed, Current Feedback Quad Operational Amplifier Data Sheet Features * * * * * * 450MHz small signal bandwidth 1500V/s slew rate 5.2mA/channel static supply current 65mA output current 120MHz gain flatness to +/- 0.1dB 14 pin SOIC Ordering Information ZL40122/DCA (tubes) 14 lead SOIC ZL40122/DCB (tape and reel) 14 lead SOIC -40C to +85C The flat gain response to 120MHz, 450MHz small signal bandwidth and 1500V/s slew rate make the device an excellent solution for video applications such as driving video signals down significant cable lengths. Other applications which may take advantage of the ZL40122 superior dynamic performance features include low cost high order active filters and twisted pair driver/receivers. April 2003 Applications * * * * Video switchers/routers Video line drivers Twisted pair driver/receiver Active filters Description The ZL40122 is a high speed, quad, current feedback operational amplifier offering high performance at a low cost. The device has a very high output current drive capability of 65mA while requiring only 5.2mA of static supply current. This feature makes the ZL40122 the ideal choice where a high density of high speed devices is required. Out_1 1 14 Out_4 13 In_n_4 In_n_1 2 1 In_p_1 3 V+ 4 In_p_2 5 4 12 In_p_4 ZL40122 2 3 11 V10 In_p_3 9 In_n_3 8 Out_3 In_n_2 6 Out_2 7 Figure 1 - Functional Block Diagram and Pin Connection 1 ZL40122 Application Notes Current Feedback Op Amps Current feedback op amps offer several advantages over voltage feedback amplifiers: * * * AC bandwidth not dependent on closed loop gain High Slew Rate Fast settling time Data Sheet The architecture of the current feedback opamp consists of a high impedance non-inverting input and a low impedance inverting input which is always feedback connected. The error current is amplified by a transimpedance amplifier which can be considered to have gain Z( f ) = Zo f 1+ j f o where Zo is the DC gain. It can be shown that the closed loop non-inverting gain is given by Vout = Vin Av fR f 1+ j fZ o o where Av is the DC closed loop gain, Rf is the feedback resistor. The closed loop bandwidth is therefore given by BWCL = f o Z o GBOL = Rf Rf and for low values of closed loop gain Av depends only on the feedback resistor Rf and not the closed loop gain. Increasing the value of Rf * * * * * Increases closed loop stability Decreases loop gain Decreases bandwidth Reduces gain peaking Reduces overshoot Using a resistor value of Rf=510 for Av=+2 V/V gives good stability and bandwidth. However since requirements for stability and bandwidth vary it may be worth experimentation to find the optimal Rf for a given application. Layout Considerations Correct high frequency operation requires a considered PCB layout as stray capacitances have a strong influence over high frequency operation for this device. The Zarlink evaluation board serves as a good example layout that should be copied. The following guidelines should be followed: * * * Include 6.8uF tantalum and 0.1uF ceramic capacitors on both positive and negative supplies Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitances Minimize all trace lengths to reduce series inductance 2 Zarlink Semiconductor Inc. Data Sheet Application Diagrams Vcc 6.8uF ZL40122 * * * Vin 0.1uF * 1/4 ZL40122 * Rf Vout Rin * Ra * 0.1uF * 6.8uF Vee * Vout Rf = Av = 1 + Vin Ra Figure 2 - Non-inverting Gain Vcc 6.8uF * * * Rb 0.1uF 1/4 ZL40122 * Rf Vout Vin * Ra * * 0.1uF Rin * 6.8uF Vee * Rf Vout = Av = - Ra Vin Figure 3 - Inverting Gain Zarlink Semiconductor Inc. 3 ZL40122 Absolute Maximum Ratings Parameter 1 2 Vin Differential Output Short Circuit Protection Symbol VIN VOS/C Min Max 1.2 See Apps Note in this data sheet 6.5 VV2 V+ V+ (see Note 3) Data Sheet Units V 3 4 5 6 Supply voltage Voltage at Input Pins Voltage at Output Pins EDS Protection (HBM Human Body Model) (see Note 2) Storage Temperature Latch-up test Supply transient test V+, VV(+IN), V(-IN) VO V V V kV 7 8 9 Note 1: Note 2: Note 3: Note 4: Note 5: -55 +150 (see Note 4) (see Note 5) C 100mA for 100ms 20% pulse for 100ms Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Human body model, 1.5k in series with 100pF. Machine model, 20in series with 100pF. 0.8kV between the pairs of +INA, -INA and +INB pins only. 2kV between supply pins, OUTA or OUTB pins and any input pin. 100mA applied to input and output pins to force the device to go into "latch-up". The device passes this test to JEDEC spec 17. Positive and Negative supply transient testing increases the supplies by 20% for 100ms. Operating Range Characteristic Supply Voltage (Vcc) Operating Temperature (Ambient) Junction to Ambient resistance Min 4.0 -40 Rth(j-a) 150 Typ Max Units V C C 4 layer FR4 board C 4 layer FR4 board Comments 6.0 +85 Junction to Case resistance Rth(j-c) 60 4 Zarlink Semiconductor Inc. Data Sheet ZL40122 Electrical Characteristics - Vcc=5V, Tamb=25C(typ.),Tamb=-40C to +85C(min-max), Av=+2V/V, Rf=510, Rload=100 unless specified. Min/ Max -40 to +85C Characteristic Conditions Typ 25C Min/ Max 25C Units Test Type1 Frequency Domain Response -3dB Bandwidth Av=+1; Vo < 0.5Vp-p; Rf=1.5k Av=+2; Vo < 0.5Vp-p; Rf=510 Av=+2; Vo < 5V p-p; Rf=510 +/- 0.1dB Flatness Differential Gain (NTSC) Differential Phase (NTSC) Time Domain Response Rise and Fall Time Vout=0.5V Step Vout=5V Step Settling Time to 0.1% Overshoot Slew Rate Noise and Distortion 2nd Harmonic Distortion 3nd Harmonic Distortion Equivalent Input Noise Voltage Non-Inverting Current Inverting Current Static, DC Performance Input Offset Voltage Average Drift Input Bias Current - Non-inverting Average Drift 2.7 2.6 6.3 5.6 7.7 15 6 6 mV V/deg. C uA nA/deg. C A C A C >1MHz >1MHz >1MHz 5.5 1.3 11 nV Hz pV Hz pA Hz C C C Vout=2Vp-p, 1MHz Vout=2Vp-p, 1MHz -84 -85 dBc dBc C C Vout=2V Step Vout=0.5V Step Vout=5V Step 1 2.8 6 4 1500 ns ns ns % V/s C C C C C Av=+2; Vo < 0.5Vp-p; Rf=510 Rload=150 Rload=150 450 380 170 120 0.01 0.015 MHz MHz MHz MHz % deg. C C C C C C Zarlink Semiconductor Inc. 5 ZL40122 Min/ Max 25C 25 58 56 50 6.5 Min/ Max -40 to +85C Data Sheet Characteristic Conditions Typ 25C 7.4 - Units Test Type1 A C A A A A Input Bias Current - Inverting Average Drift Power Supply Rejection Ratio (+ve) Power Supply Rejection Ratio (-ve) Common Mode Rejection Ratio Supply Current (per Channel) Miscellaneous Performance Input Resistance (Non-inverting) Input Capacitance (Non-inverting) Common Mode Input Range Output Voltage Range Output Current (max) Output Resistance, Closed Loop DC Rload=100 DC DC DC Quiescent 28 15 57 55 49 6.7 A nA/deg. C dB dB dB mA 61 58 54 5.2 8 1 2.4 2.8 65 90 2.2 2.7 - 2.0 2.6 - M C C A A C C pF V V mA m Note: Test Types: (A) 100% tested at 25C. Over temperature limits are set by characterization and simulation. (B) Limits set by characterization or simulation. (C) Typical value only for information. 6 Zarlink Semiconductor Inc. Data Sheet ZL40122 Typical Performance Characteristics - Tamb=25degC, Vsupply= 5V, Rload=100, Av=+2V/V, Rf=510, unless otherwise specified. Non-Inverting Frequency Response 2 0 -2 Normalised Gain (dB) -4 Phase -6 -8 -10 -12 -14 1 10 Frequency (MHz) 100 Vo=0.5Vp-p Av =+4 Rf = 150 Av =+2 Rf = 510 0 -50 -100 -150 -200 1000 Gain Av =+1 Rf = 1k Av =+8 Rf = 150 200 150 100 50 Zarlink Semiconductor Inc. Phase (deg.) 7 ZL40122 Data Sheet Non-Inverting Frequency Response varying Rf 2 0 -2 Normalised Gain (dB) -4 -6 -8 -10 -12 -14 -16 -18 10 100 Frequency (MHz) 1000 Vo=0.5Vp-p Rf=700 Rf=510 Rf=250 Rf=390 Open Loop Transimpedance Gain and Phase 120 110 Transimpedance Gain 100 90 80 70 60 50 40 1.0E+03 Transimpedance Phase Transimpedance Gain 0 -30 -60 -90 -120 -150 -180 -210 -240 1.0E+09 Transimpedance Phase 1.0E+04 1.0E+05 1.0E+06 Frequency (Hz) 1.0E+07 1.0E+08 8 Zarlink Semiconductor Inc. Data Sheet ZL40122 Large Signal Gain 0 -2 -4 Gain (dB) -6 -8 -10 -12 -14 -16 10 100 Frequency (MHz) 1000 Vo = 5V p-p Vo = 4V p-p Vo = 1V p-p Harmonic Distortion vs Frequency -40 Vo = 2V p-p 2nd & 3rd Harmonic Distortion (dBc) -50 -60 2nd Harmonic -70 -80 3rd Harmonic -90 -100 1 10 Frequency (MHz) 100 Zarlink Semiconductor Inc. 9 ZL40122 Data Sheet CMRR 70 T = - 40 degC 60 Rejection Ration (dB) 50 40 30 20 10 0 1.0E+03 T = + 25 degC T = + 85 degC 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 Frequency (Hz) PSRR +ve 80 T = - 40 degC 70 Rejection Ration (dB) 60 T = + 25 degC 50 40 30 20 10 0 1.0E+03 T = + 85 degC 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 Frequency (Hz) 10 Zarlink Semiconductor Inc. Data Sheet ZL40122 PSRR -ve 70 T = - 40 degC 60 Rejection Ration (dB) 50 40 30 20 10 0 1.0E+03 T = + 25 degC T = + 85 degC 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 Frequency (Hz) T Input Voltage and Current Noise 100 Current Noise (pA/SQRT(Hz) Voltage Noise (nV/SQRT(Hz) Inverting Input Current Noise 10 Input Voltage Noise Non-Inverting Input Current 1 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 Frequency (Hz) Zarlink Semiconductor Inc. 11 ZL40122 Data Sheet Supply Current vs Temperature 5.60 5.50 5.40 Supply Current (mA) 5.30 5.20 5.10 5.00 4.90 4.80 4.70 -40 -20 0 20 40 60 80 100 120 140 Die Temp (deg. C) DC Drift Over Temperature 9.00 8.00 Input Offset Voltage (mV) Input Bias Current (uA) 7.00 6.00 5.00 4.00 3.00 2.00 1.00 0.00 -40 -20 0 20 40 60 80 100 120 140 Die Temp (deg. C) Input Bias Non-Inv Input Offset Voltage Input Bias Inv 12 Zarlink Semiconductor Inc. Data Sheet ZL40122 Large and Small Signal Pulse Response 3 0.6 Vout = 5V Step 2 Large Signal Vout (V) 0.4 1 Vout = 0.5V Step 0.2 0 0 -1 -0.2 -2 -0.4 -3 0 10 20 30 40 Time (ns) 50 60 70 80 -0.6 Closed Loop Output Impedance 10 Closed Loop Output Impedance (Ohms) 1 0.1 0.01 0.01 0.1 1 10 Small Signal Vout (V) 100 Frequency (MHz) Zarlink Semiconductor Inc. 13 ZL40122 Data Sheet Differential Gain & Phase ZL40122 / ZL40123 NTSC RL=150? 0.07 0.06 0.05 0.04 Differential Gain & Phase (?% & ?) 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05 -0.06 -0.07 -0.7 Best fit Gain Best fit Phase -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Bias Voltage 14 Zarlink Semiconductor Inc. c Zarlink Semiconductor 2003 All rights reserved. Package Code Previous package codes ISSUE ACN DATE APPRD. For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively "Zarlink") is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink's conditions of sale which are available on request. Purchase of Zarlink's I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE |
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